The EUMaster4HPC programme continues to foster impactful collaborations between outstanding students and Europe’s leading research institutions. One such collaboration took place at the Barcelona Supercomputing Center (BSC), where student intern Lorenzo Migliari transformed an innovative concept in memory architecture into meaningful research outcomes with potential implications for future high-performance computing systems.

Student Profile: A path from engineering to research

Lorenzo Migliari recently completed his double degree in High-Performance Computing within the EUMaster4HPC programme, studying at the University of Luxembourg and the Barcelona Supercomputing Center. He previously earned a Bachelor’s degree in Computer Engineering from Politecnico di Milano and has since embarked on a PhD in Informatics at Università della Svizzera italiana (USI). Describing his motivation, Lorenzo emphasised, “What I enjoy the most is sharing ideas, learning together, and seeing problems from new angles.”

Hosting Institution: Barcelona Supercomputing Center (BSC)

BSC, Spain’s national supercomputing centre, is renowned for its leadership in HPC research across Europe. The centre conducts cutting-edge projects within European and national frameworks, often in partnership with industry. Lorenzo joined the Computer Architecture for Parallel Paradigms Group within the Computing Sciences Department, working under the supervision of Prof. Daniel Jimenez, Dr. Osman Unsal, and Dr. Adrian Cristal. As his supervisors noted, “It was a pleasure to host Lorenzo. A trio of advisors ensured to keep him busy at all times.”

Internship focus: Exploring memory optimisation at scale

Lorenzo’s six-month internship centred on the topic “Leveraging Low-Confidence Prefetches for DRAM Row Management.” The goal was to evaluate whether speculative DRAM prefetches—typically discarded due to low confidence—could instead be used strategically to reduce memory latency. Working primarily in C++ on Linux-based HPC systems, he developed large-scale simulations to test this hypothesis across 70 diverse workloads.

Research outcomes: From hypothesis to architectural insight

The investigation revealed that over half of discarded low-confidence prefetches, and up to 90% in graph and sparse workloads, mapped to useful DRAM rows. This resulted in an improvement of row-buffer locality by as much as 20%. These findings opened new avenues for memory optimisation in data-intensive HPC applications. The results were compelling enough to support the submission of a research publication, and, as his supervisors confirmed, Lorenzo’s contributions strengthened BSC’s ongoing architectural research efforts.

Dual impact: Career momentum and institutional value

Reflecting on his experience, Lorenzo shared, “Beyond the technical results, I truly enjoyed working at BSC, a place full of great researchers and experts ready to help and support you.” BSC likewise acknowledged his impact, stating that his performance motivated them to consider him for future research opportunities, even though he chose to begin his PhD closer to home.

Reflection: A foundation for future research

Lorenzo credits the EUMASTER4HPC programme for equipping him with both the technical foundation and the international exposure necessary for research success. “The programme gave me the background to understand memory systems and use HPC resources, while also allowing me to travel and build valuable connections,” he noted. The challenge of developing and validating a new model not only strengthened his expertise but also played a decisive role in his decision to pursue a doctoral path.